The recent HBM4 specification announced by JEDEC is great news for developers of AI training hardware. HBM4 is the latest specification in the rapidly ...

Chip designers are often stuck between a rock and a hard place. Not only are they dealing with staggering design complexity, but they're also under pressure ...

Designed as an evolutionary step beyond the previous HBM3 standard, JESD270-4 HBM4 will further enhance data processing rates while maintaining essential features such as higher bandwidth, power ...

ARQUIMEA has demonstrated BrainChip’s Akida with a Prophesee event-based Metavision® camera on a low-power drone to detect distressed swimmers and surfers, helping lifeguards scale their services for ...

The introduction of LPDDR5 in 2019 marked a major leap, delivering up to 6400Mbps and adding features like in-line ECC for ...

Andes Technology, the global leader in RISC-V processor IP, celebrates its 20th anniversary by unveiling a refreshed logo and announcing the upcoming opening of its new headquarters.

Creonic, the leading provider of high-performance IP cores for ASIC and FPGA technologies, has unveiled a bold new brand ...

Siemens Digital Industries Software today announced that Secafy has adopted Siemens’ full IC design flow consisting of its ...

VeriSilicon’s GCNano3DVG IP combines optimized hardware pipelines with a lightweight and configurable software stack to ...

The transaction will augment Cadence’s expanding design IP offerings, anchored by a leading portfolio of protocol and interface IP, memory interface IP, SerDes IP at the most advanced nodes, and ...

Announcing Orthogone as Blackcore Labs Partner, this collaboration integrates Orthogone’s industry-leading Ultra-Low Latency IP cores with Blackcore’s high-performance Intel and AMD-based servers, ...

Next-generation AMD EPYC CPU, codenamed “Venice,” is the first HPC product to be brought up on TSMC’s next-generation N2 node ...